The present invention refers to a voltage boost device for nonvolatile memories, which operates in a low consumption standby condition.
As is known, nonvolatile memories are used, i.a., in systems comprising various devices and a microprocessor performing instructions and data transfer. In such devices it is important that, while a device is selected for interacting with the microprocessor, all the other devices are disabled, in order to prevent undesirable interference from causing errors.
In order to speed up the processes for enabling and disabling the devices, and hence optimize system performance, when the devices are not selected, they are not turned off (i.e., they are not disconnected from their respective power supply sources), but brought to waiting, or standby, condition. This enables an advantageous reduction in energy consumption to be achieved, as well as the elimination of the danger of interference with processes currently in progress.
On the other hand, in order not to degrade the processing speed of the system, transition from the standby state to the active state must be fast, and transients must be avoided that might slow down execution of the operations requested.
As regards nonvolatile memories in particular, the most critical operation is reading, both because, as compared to other operations, such as programming and erasure, it must be performed in a very short time, and because it is necessary to supply the gate terminals of the cells to be read with high voltages, i.e., higher than the supply voltage. For low supply voltage multilevel memories it is moreover essential for the value of the read voltage supplied to be precise and close to the value of the nominal read voltage.
In order to meet this requirement, a known solution consists in using voltage boosters employing charge pumps and regulation circuits, so as to obtain the required high read voltages and precision when the memory is selected to interact with the microprocessor.
Such voltage boosters, however, have a drawback. In fact, the charge pumps and the regulation circuits have consumption levels which are too high to enable these devices to remain active also while the memory is in standby, and consequently they must be deactivated; on the other hand, when they are not supplied, the output terminals of the charge pumps, which are to supply the read voltage to the gate terminals of the addressed cells to be read, are discharged by leakage currents. Consequently, when the memory returns to the active state from the standby state, it is necessary to wait for a charge transient and it is not possible to reach the necessary read voltage rapidly and with the required precision. In this case, therefore, the reading operation requires a longer time as compared to when the memory is already in the active state.
The aim of the present invention is to provide a voltage boost device which is free from the drawbacks described above, and in particular which enables a terminal to be kept at a desired voltage during the standby phases, and at the same time has low consumption levels.
A voltage boost device includes a first boost stage and a second boost stage connected to an input terminal and to an output terminal, the output terminal supplying an output voltage higher than a supply voltage. The input terminal receives an operating condition signal having a first logic level representative of a standby operating state and a second logic level representative of an active operation state. The first boost stage is enabled in presence of the second logic level of the operating condition signal, and is disabled in presence of the first logic level of the operating condition signal; the second boost stage is controlled in a first operating condition in presence of the first logic level of the operating condition signal, and is controlled in a second operating condition in presence of the second logic level of the operating condition signal.